Samsung Galaxy A04e Power Architecture - MT6357 PMIC Explained

Samsung Galaxy A04e (SM-A042M) – Power Architecture with MT6357 PMIC

Power Block Diagram - Galaxy A04e

In this post, we’ll break down the complete power architecture of the Samsung Galaxy A04e (SM-A042M), which uses the MT6357 PMIC to manage its power distribution. This power block diagram shows how voltage is sourced, regulated, distributed, and consumed across various components like the CPU (MT6765), RAM, eMMC, and USB system.

🔋 Battery Input & VSYS Line

The power flow begins at the battery (labelled BAT), which connects to an interface PMIC (RT9471). This IC manages battery charging and protection. The output from this block is the VSYS line, which acts as the main power rail for the rest of the system.

🧠 Main PMIC – MT6357

The heart of the power system is the MT6357 PMIC. It receives power from VSYS and then generates multiple regulated voltage rails required by various subsystems. These include:

  • VPROC – Supplies power to the CPU core
  • VCORE – Supplies power to internal SOC logic
  • VSRAM_PROC and VSRAM_OTHERS – Supplies SRAM and memory buffers
  • VMODEM – Supplies modem and RF section
  • VUSB – Powers the USB interface

🔁 Buck Converters & LDO Regulators

MT6357 uses a combination of Buck converters and LDOs (Low Drop-Out regulators) to step down the voltage as required:

  • U1901 – A Buck converter that converts VSYS to VA12
  • U1900 – An LDO that generates a fixed voltage from VS2
  • U1902, U1903, U1904 – Buck converters controlled by the PMIC using EXT_BUCK_EN signals, powering the DRAM, eMMC and processor

⚙️ Enable Signals & Power Sequencing

Power delivery is carefully sequenced using enable signals:

  • EXT_PMIC_EN1 and EXT_PMIC_EN2 are control lines from the PMIC that turn on specific Buck regulators.
  • This ensures that components receive power in the correct order during boot-up, which is crucial for system stability.

📦 eMCP – DRAM + eMMC Power

The eMCP block (U1801) combines DRAM and eMMC in one package. It needs multiple voltage rails:

  • VDD1, VDD2 – Supply DRAM (volatile memory)
  • VCC, VCCQ – Power the eMMC storage
  • VDDQ – Interface voltage for I/O operations

📶 Crystal Oscillator and Reference Signals

The PMIC also interfaces with the main oscillator (XO) through XTAL1 and XTAL2 lines, which provide clock signals for the SOC. Other voltage references like VREF, VXO22, and VAUX18 are used internally for regulation, ADCs, or RF subsystems.

🧪 Voltage Rail Details

  • VSYS – Primary power source from battery interface
  • VS1, VS2 – Intermediate rails generated by the PMIC for further regulation
  • VA12 – A 1.2V rail derived from VSYS using U1901
  • VMODEM – Specific to modem operation (RF and baseband)
  • VUSB – For USB PHY and data controller

🔄 How the System Powers Up

When the PWR_KEY is pressed:

  1. VSYS becomes active via the battery interface PMIC (RT9471)
  2. The MT6357 PMIC receives this voltage and activates its internal logic
  3. Enable signals EXT_PMIC_EN1 and EN2 are triggered to power the buck converters
  4. Each rail is powered up in a specific sequence — starting from core (VCORE), SRAM (VSRAM), processor (VPROC), DRAM, eMMC, and peripherals
  5. The SOC (MT6765) boots and initializes the OS

💡 Useful Notes

  • MT6357 is designed specifically for MediaTek chipsets like MT6765 (used in A04e)
  • Power-up sequence is essential — incorrect power-on order may cause boot failure
  • When debugging a dead phone, always check for VSYS, VPROC, and VCORE first

📌 Conclusion

The MT6357 PMIC in the Samsung Galaxy A04e is the core of its power delivery system. It converts battery voltage into a well-regulated set of outputs for each subsystem like CPU, RAM, storage, and USB. Understanding this block diagram is critical for mobile repair engineers and technicians who deal with hardware-level faults or dead phones.

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